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Old 07-01-2010, 03:07 AM
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mightyduck mightyduck is offline
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Default Re: Loop Sync issues

Quote:
Originally Posted by Top Jimmy View Post
The 192 word in is terminated internally.
probably. i remember some discussion where people were annoyed at the way it had been done which stopped them from using "t" connectors.


Quote:
Originally Posted by topjimmy
Daisy chaining word clock I/O is not a good idea. Each generation would be adding another layer of PLL along with its inherent error. The last device in the chain would most likely be a getting a clock with jitter an order of magnitude or greater than the first device. I once had to run a setup like that where I had to clock 4 devices each to the previous one. The signal from the last device would not pass back to the first one without noise/dropouts likely from serial clock phase error.
i disagree with that. why are you so sure that there is not a simple pass-through from word input to word output in effect when the 192 is receiving external sync? that's the usual plan.

and even if the signal is making it through each interface's pll, that is going to make each interface's output identical because each input will have been cleaned and re-shaped by the exact same pll since all the interfaces are digi 192s.

the usual rule of thumb is that up to 3 devices [maybe 4] in a daisy chain is not probematic.

Quote:
Originally Posted by topjimmy
At least with loop sync the I/O is paralleled except at the loop master which is providing the clock.
that's not correct. its still a daisy chain, with buffers, and subject to degradation.

and any closed loop system has to have some slop to allow for the downsteam signal to be fed back to the first unit, after first making its way through several devices and buffers.

it seems to me that the digi loop sync plan is primarily in place to encourage the use of digidesign interfaces, especially when there is internal termination which you can't switch off [which makes it impossible to use t connectors].
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